Error Response - PENN Controls - VFD68Bxx - VFD68Cxx - VFD68Dxx - Three‐Phase Motor Speed Controller - VFD68 Three‐Phase Variable Frequency Drive

VFD68 Variable Frequency Drives Technical Bulletin

Brand
PENN Controls
Product name
VFD68 Three‐Phase Variable Frequency Drive
Document type
Technical Bulletin
Part number
24-7664-3051
Document revision
C
Revision date
2019-08-09
Language
English

An error response is returned if the query message received from the master has an illegal function, address, or data. No response is returned for a parity, CRC, overrun, framing, or busy error.

Note: No response message is sent in the case of broadcast communication.
Table 1. Error Response (Response Message)
Subordinate Address Function Exception Code CRC Check
(8 bit) H80 + function (8 bit) (8 bit) L (8 bit) H (8 bit)
Table 2. Error Response (Response Message)
Message Setting Description
Subordinate Address Address received from the master.
Function Master-requested function code + H80
Exception Code See Table 3.
Table 3. Error Code List
Code Error Item Error Description
01 Illegal Function The set function code in the query message from the master cannot be processed by the subordinate.
02 Illegal Data Address1 The set register address in the query message from the master cannot be processed by the subordinate.
03 Illegal Data Value The set data in the query message from the master cannot be processed by the subordinate.
Note: An error occurs if all accessed holding registers do not exist.
Note: Data read from a nonexistent holding register is 0, and data written there is invalid.
1 An error does not occur in the following cases:
  • a. Function code H03 (Read holding register data) - when the number of points is 1 or more and there is one or more holding registers from which the data may be read.
  • b. Function code H10 (write multiple holding register data) - when the number of points is 1 or more and there is one or more holding registers to which the data may be written. When the function code H03 or H10 is used to access multiple holding registers, an error does not occur if a nonexistent holding register, read-disabled register, or write-disabled register is accessed.